1. Field of the Invention
The present invention relates to a semiconductor device including a thin film transistor (TFT) and a device manufacture process thereof, and a contact structure (or a connection structure) of the wiring line in a semiconductor device and a contact forming process thereof. The semiconductor device of the invention includes not only an element such as a thin film transistor (TFT) or a MOS transistor but also a display device including a semiconductor circuit composed of such insulated gate type transistors, and an electrooptical device such as an image sensor. In addition, the semiconductor device of the invention includes an electronic device having such display device and electrooptical device.
2. Related Art
The thin film transistor (as will be called the xe2x80x9cTFTxe2x80x9d) can be formed over a transparent glass substrate so that its application and development to the active matrix type display device has been positively proceeded. In the active matrix type display device, an electric field to be applied to liquid crystals is controlled in a matrix shape by a plurality of pixels arranged in the matrix shape thereby to realize a highly fine image display. The TFT utilizing a crystalline semiconductor film can achieve a high mobility so that a highly fine image display can be realized by integrating functional circuits over a common substrate.
The active matrix type display device requires more TFTs as many as one million for the pixels as the resolution of the screen becomes finer. If the functional circuits are added, the more TFTs are required to retain the reliabilities and stable actions of the individual TFTs so that the liquid crystal display device may stably act.
The specifications required of the actual liquid crystal display device (as also called the xe2x80x9cliquid crystal panelxe2x80x9d) are so strict that both the pixels and the drivers have to retain high reliabilities for the normal operations of all pixels. Especially when the driver circuit is troubled, the pixels of one column (or row) cause malfunctions to invite a defect called the xe2x80x9cline defectxe2x80x9d. If one pixel is troubled, on the other hand, this trouble is called the xe2x80x9cpoint defectxe2x80x9d.
Most of the aforementioned line defect and point defect are caused by the malfunctions of the TFTs.
On the other hand, the material used for wiring these TFTs is exemplified by Al, Ta or Ti, of which aluminum having a low resistivity is frequently used. However, aluminum has a low resistance but has a drawback of a low heat resistance.
When the TFT is manufactured by using aluminum as the material for the gate line (including the gate electrode), a projection such as the hillock or whisker has been formed by the heat treatment to cause the malfunction of the TFT or lower the TFT characteristics. On the other hand, the aluminum atoms are caused by the heat treatment to diffuse into a gate insulating film and a channel forming region to cause the malfunction of the TFT or lower the TFT characteristics.
On the other hand, our Unexamined Published Japanese Patent Application No. 7-135318 which corresponds to a U.S. Pat. No. 5,648,277 has disclosed the TFT structure in which the periphery of a gate line is protected with an oxide film (or an alumina film) by using a thin film (as also called the xe2x80x9caluminum alloyxe2x80x9d) composed mainly of aluminum as the gate line. When the TFT structure of the Japanese Patent Application is adopted, it is possible to prevent formation of the projection such as the hillock or whisker, but it is difficult to remove a barrier type anodized film (or an anodized film using a neutral electrolyte) formed over a gate electrode and to form a contact between the gate electrode and a lead-out electrode. Therefore, a malfunction is invited by the poor contact between the gate electrode and the lead-out electrode. In the peripheral drive circuit, on the other hand, a temperature rise or the like is caused by a large-current operation so that a reliable contact is also demanded.
On the other hand, the contact can be formed by using a special etchant, as called the xe2x80x9cchromium-mixed acid (an etchant prepared by mixing an aqueous solution of chromic acid, phosphoric acid, nitric acid, acetic acid and water) as one for selectively removing only the barrier type anodized film formed over the gate electrode. However, the process using a heavy metal chromium, as may be detrimental to human bodies, is not industrially desirable. On the other hand, the etchant to take place of that chromium-mixed acid is not found at present.
On the other hand, the TFT utilizing a poly-silicon film is still inferior in the reliability to the MOSFET (a transistor formed over a single-crystalline semiconductor substrate) to be used in the LSI. So long as this weak point is not eliminated, moreover, there has been widely accepted a viewpoint that it is difficult to form the LSI circuit with the TFT.
The invention has been conceived in view of the problems thus far described and has an object to provide a technique for manufacturing a wiring line of a low resistance and a high heat resistance so as to make the active matrix type display device larger and finer.
Another object of the invention is to provide a contact structure which provides an excellent ohmic contact between a first wiring line and a second wiring line without a noxious etchant such as the chromium-mixed acid.
Still another object of the invention is to provide a highly reliable semiconductor device including a semiconductor circuit which has such contact structure and which is formed of TFTs proud of a reliability equivalent to or higher than that of MOSFETs.
In order to solve the above-specified problems, the invention has a main construction in which a gate line (including a gate electrode) made of only aluminum in the prior art is give a laminated structure of a refractory metal, a metal of low resistivity and a refractory metal and in which the gate line is protected by an anodized film. By utilizing the invention, it is possible to form a gate line having a low resistance and a high heat resistance and to form a contact with the gate line easily.
According to a first construction of the invention to be disclosed herein, there is provided a wiring line comprising a multi-layered film in which a first conductive layer, a second conductive layer and a third conductive layer are laminated in the recited order,
wherein the surfaces of the first conductive layer, the second conductive layer and the third conductive layer are oxidized to form oxide films, and
wherein the second conductive layer has a width different from those of the first conductive layer and the third conductive layer.
In the aforementioned construction, the oxide film of the first conductive layer, the oxide film of the second conductive layer and the oxide film of the third conductive layer are of the barrier type.
In each of the aforementioned constructions, on the other hand, the third conductive layer is made of a valve metal.
In the aforementioned constructions, on the other hand, the second conductive layer is made of a material composing aluminum or titanium as its main component.
According to the construction on the manufacture process for practicing the invention, on the other hand, there is provided a process for manufacturing a wiring line, comprising the steps of:
forming a multi-layered film in which a first conductive layer, a second conductive layer and a third conductive layer are laminated in the recited order;
patterning the multi-layered film to form a wiring line; and
anodizing the wiring line;
wherein at the anodizing step, the first conductive layer, the second conductive layer and the third conductive layer are anodized in the same forming solution, and
wherein the second conductive layer has a width different from those of the first conductive layer and the third conductive layer.
The aforementioned construction is characterized in that the wiring line (including an electrode) is constructed of a laminated structure of three or more layers. Moreover, this wiring line is protected with an anodized film.
In order to solve the aforementioned problems, on the other hand, the invention provides as its main construction of a semiconductor device in which a first wiring line has a laminated structure of three or more layers and which has a contact structure (of a first wiring line and a second wiring line) realizing an excellent ohmic contact. By utilizing the invention, it is possible to form the first wiring line having a low resistance and a high heat resistance and to form the contact between the first wiring line and the second wiring line easily.
According to the construction of the invention to be disclosed herein, there is provided a semiconductor device comprising:
a first wiring line including a multi-layered film in which a first conductive layer, a second conductive layer and a third conductive layer are laminated in the recited order;
an insulating film covering the first wiring line; and
a second wiring line formed over the insulating film and electrically connected with the first wiring line,
wherein in order to connect the first wiring line and the second wiring line, there is formed a contact hole extending through the insulating film and the third conductive layer and exposing the second conductive layer at its bottom portion, and
wherein the second wiring line and the exposed second conductive layer contact with each other.
According to another construction of the invention, on the other hand, there is provided a semiconductor device comprising:
a first wiring line including a multi-layered film in which a first conductive layer, a second conductive layer and a third conductive layer are laminated in the recited order;
an insulating film covering the first wiring line; and
a second wiring line formed over the insulating film and electrically connected with the first wiring line,
wherein in order to connect the first wiring line and the second wiring line, there is formed a contact hole extending through the insulating film and exposing the third conductive layer at its bottom portion, and
wherein the second wiring line and the exposed third conductive layer contact with each other.
According to another construction of the invention, on the other hand, there is provided a semiconductor device comprising:
a first wiring line including a multi-layered film in which a first conductive layer, a second conductive layer and a third conductive layer are laminated in the recited order;
an insulating film covering the first wiring line; and
a second wiring line formed over the insulating film and electrically connected with the first wiring line,
wherein the first wiring line is covered at its surface with the oxide films of the individual conductive layers constructing the multi-layered film,
wherein in order to connect the first wiring line and the second wiring line, there is formed a contact hole extending through the insulating film, the oxide film of the first wiring line and the third conductive layer and exposing the second conductive layer at its bottom portion, and
wherein the second wiring line and the exposed second conductive layer contact with each other.
According to another construction of the invention, on the other hand, there is provided a semiconductor device comprising:
a first wiring line including a multi-layered film in which a first conductive layer, a second conductive layer and a third conductive layer are laminated in the recited order;
an insulating film covering the first wiring line; and
a second wiring line formed over the insulating film and electrically connected with the first wiring line,
wherein the first wiring line is covered at its surface with the oxide films of the individual conductive layers constructing the multi-layered film,
wherein in order to connect the first wiring line and the second wiring line, there is formed a contact hole extending through the insulating film and the oxide film of the first wiring line and exposing the third conductive layer at its bottom portion, and
wherein the second wiring line and the exposed third conductive layer contact with each other.
In each of the aforementioned constructions, the third wiring line is made of a material containing a valve metal as its main component.
In each of the aforementioned constructions, the oxide film of the second conductive layer is an anodized film of the barrier type.
According to another construction of the invention, on the other hand, there is provided a semiconductor device comprising:
a first wiring line including a multi-layered film in which a first conductive layer, a second conductive layer and a third conductive layer are laminated in the recited order;
an insulating film covering the first wiring line; and
a second wiring line formed over the insulating film and electrically connected with the first wiring line,
wherein the first wiring line is oxidized at its side portion so that the second conductive layer composing the multi-layered film is covered at its side portion with the oxide film,
wherein in order to connect the first wiring line and the second wiring line, there is formed a contact hole extending through the insulating film, the oxide film of the first wiring line and the third conductive layer and exposing the second conductive layer at its bottom portion, and
wherein the second wiring line and the exposed second conductive layer contact with each other.
In each of the aforementioned constructions, on the other hand, the first wiring line is the gate line of a thin film transistor.
According to the construction on a manufacture process for practicing the invention, on the other hand, there is provided a process for manufacturing a semiconductor device, comprising the steps of:
forming a multi-layered film in which a first conductive layer, a second conductive layer and a third conductive layer are laminated in the recited order;
patterning the multi-layered film to form a first wiring line;
forming an insulating film covering the first wiring line;
forming a contact hole extending through the insulating film and reaching the first wiring line; and
forming over the insulating film a second wiring line electrically connected with the first wiring line through the contact hole,
wherein the contact hole extends through the third conductive layer and exposes the second conductive layer at its bottom portion, and
wherein the second wiring line contacts with the second conductive layer.
According to another construction of the invention on the manufacture process, on the other hand, there is provided a process for manufacturing a semiconductor device, comprising the steps of:
forming a multi-layered film in which a first conductive layer, a second conductive layer and a third conductive layer are laminated in the recited order;
patterning the multi-layered film to form a first wiring line;
forming an insulating film covering the first wiring line;
forming a contact hole extending through the insulating film and reaching the first wiring line; and
forming over the insulating film a second wiring line electrically connected with the first wiring line through the contact hole,
wherein the second conductive layer is exposed at the bottom portion of the contact hole to bring the second wiring line into close contact with the second conductive layer.
According to another construction of the invention on the manufacture process, on the other hand, there is provided a process for manufacturing a semiconductor device, comprising the steps of:
forming a multi-layered film in which a first conductive layer, a second conductive layer and a third conductive layer are laminated in the recited order;
patterning the multi-layered film to form a first wiring line;
anodizing the first wiring line to form on its surface the anodized films of the individual conductive layers composing the multi-layered film;
forming an insulating film covering the first wiring line;
forming a contact hole extending through the insulating film and reaching the first wiring line; and
forming over the insulating film a second wiring line electrically connected with the first wiring line through the contact hole,
wherein the contact hole extends through the anodized film of the third conductive layer and the third conductive layer and exposes the third conductive layer at its bottom portion, and
wherein the second wiring line contacts with the third conductive layer.
According to another construction of the invention on the manufacture process, on the other hand, there is provided a process for manufacturing a semiconductor device, comprising the steps of:
forming a multi-layered film in which a first conductive layer, a second conductive layer and a third conductive layer are laminated in the recited order;
patterning the multi-layered film to form a first wiring line;
anodizing the first wiring line to form on its surface the anodized films of the individual conductive layers composing the multi-layered film;
forming an insulating film covering the first wiring line;
forming a contact hole extending through the insulating film and reaching the first wiring line; and
forming over the insulating film a second wiring line electrically connected with the first wiring line through the contact hole,
wherein the contact hole extends through the anodized film of the third conductive layer and exposes the third conductive layer, and
wherein the second wiring line contacts with the exposed third conductive layer.
According to another construction of the invention, on the other hand, there is provided a semiconductor device comprising a CMOS circuit including an n-channel thin film transistor and a p-channel thin film transistor,
wherein the CMOS circuit includes a gate line intersecting the semiconductor layer of the n-channel thin film transistor and the semiconductor layer of the p-channel thin film transistor through a gate insulating film,
wherein the gate line includes a multi-layered film in which a first conductive layer, a second conductive layer and a third conductive layer are laminated in contact with the gate insulating film,
wherein the semiconductor layer of the p-channel thin film transistor has a p-type impurity region non-overlapping the gate line,
wherein the semiconductor layer of the n-channel thin film transistor includes: a channel forming region; a first n-type impurity region; a second n-type impurity region interposed between the channel forming region and the first n-type impurity region and contacting with the channel forming region; and a third n-type impurity region interposed between the first n-type impurity region and the second n-type impurity region,
wherein the second n-type impurity region and the third n-type impurity region have a lower n-type impurity concentration than that of the first n-type impurity region,
wherein the second n-type impurity region overlaps the gate line through the gate insulating film, and
wherein the third n-type impurity region does not overlap the gate line.
In each of the constructions, the third conductive layer is a film containing a valve metal as its main component.
According to the construction on the manufacture method for practicing the invention, there is provided a process for manufacturing a semiconductor device, comprising the steps of:
forming a semiconductor layer;
forming an insulating film in contact with the semiconductor layer;
forming a first photoresist mask contacting with the insulating film and intersecting the first semiconductor layer;
firstly doping the semiconductor layer heavily with an n-type impurity through the first photoresist mask;
forming a second photoresist mask narrower in the channel length direction than the first photoresist mask;
secondly doping the semiconductor layer lightly with an n-type impurity through the second photoresist mask; and
forming a gate electrode intersecting the semiconductor layer through the insulating film,
wherein the gate electrode is formed of a multi-layered film in which a first conductive layer, a second conductive layer and a third conductive layer are laminated in the recited order from the insulating film side.
According to another construction of the invention on the manufacture process, on the other hand, there is provided a process for manufacturing a semiconductor device, comprising the steps of:
forming a first semiconductor layer and a second semiconductor layer;
forming an insulating film in contact with the first semiconductor layer and the second semiconductor layer;
forming a first photoresist mask contacting with the insulating film and intersecting the first semiconductor layer;
firstly doping the first semiconductor layer heavily with an n-type impurity through the first photoresist mask;
forming a second photoresist mask narrower in the channel length direction than the first photoresist mask;
secondly doping the first semiconductor layer lightly with an n-type impurity through the second photoresist mask;
forming a third photoresist mask contacting with the insulating film and intersecting the second semiconductor layer;
thirdly doping the second semiconductor layer heavily with a p-type impurity through the third photoresist mask; and
forming a gate electrode intersecting the semiconductor layer through the insulating film,
wherein the gate electrode is formed of a multi-layered film in which a first conductive layer, a second conductive layer and a third conductive layer are laminated in the recited order from the insulating film side.
In the foregoing constructions, the xe2x80x9cvalve metalxe2x80x9d implies a metal indicating a valve action in which a barrier type anodized film passes a cathode current but not an anode current (Table of Electrochemistry, 4th Edition, P.370, edited by Association of Electrochemistry, Maruzen, 1985).
The valve metal to be used in the invention is represented by tantalum (Ta), niobium (Nb), hafnium (Hf) or zirconium (Zr). Of these, it has been confirmed that tantalum can be anodized with the same electrolyte as that for a thin film containing aluminum as its main component so that it is suitable for the invention. It is also possible to use a tantalum alloy such as molybdenum-tantalum (MoTa).
If the aforementioned construction is applied to the active matrix type liquid crystal display device, on the other hand, the first wiring line corresponds to a gate line for feeding a gate signal to a plurality of TFTs, and the second wiring line corresponds to one (as will be called the xe2x80x9cupper linexe2x80x9d) for transmitting a signal from the outside to the gate line.
Herein, the gate electrode is one intersecting the semiconductor layer across the gate insulating film and one for forming a depletion layer by applying an electric field to the semiconductor layer. In other words, the portion in the gate line, as intersecting the semiconductor layer across the gate insulating film, is the gate electrode.
Herein, moreover, the portion contacting with the gate electrode in the upper line formed over the layer insulating film is the lead-out electrode.
The invention is characterized in that the wiring line (including the electrode) is given a laminated structure of three or more layers. Herein: the lowermost layer indicates the first conductive layer; the uppermost layer indicates the third conductive layer; and the layer between the first conductive layer and the third conductive layer indicates the second conductive layer.